Integrated circuits are commonly formed on a semiconductor substrate such as a silicon wafer or other semiconductive material. In general, layers of various materials which are semiconductive, conductive, or electrically insulative are used to form the integrated circuits. By way of examples, the various materials may be doped, ion implanted, deposited, etched, grown, etc. using various process. A continuing goal in semiconductive processing is to reduce the size of individual electronic components, thereby enabling smaller and denser integrated circuitry.
One technique for patterning and processing semiconductor substrates is lithography. Such may include deposition of a patternable masking layer over underlying substrate material. The masking layer may be patterned to form openings there-through of desired shapes and configuration. The underlying substrate material may be processed through the openings in the masking material (e.g., by ion implanting, etching, etc.) to produce a desired change in the underlying substrate material having or approximating the pattern in the masking material. The masking layer which may be used may be referred to as resist, with photoresist used in photolithography being one example. In certain instances, multiple different layers of photoresist and/or a combination of photoresist with hard-masking and other materials are used. Further, patterns may be formed on substrates without using resist or photoresist.
The continual reduction in feature sizes of integrated circuit components places ever greater demands on the techniques used to form those features. For example, photolithography is commonly used to form pattern features such as conductive lines and arrays of contact openings to underlying circuitry. A concept commonly referred to as “pitch” can be used to describe the sizes of the repeating features in conjunction with spaces immediately adjacent thereto. Pitch may be defined as the distance between an identical point in two neighboring features of a repeating pattern in a straight-line cross-section, thereby including the maximum width of the feature and the space to the next immediately adjacent feature. However, due to factors such as optics and light or radiation wavelength, photolithography techniques tend to have a minimum pitch below which a particular technique cannot reliably form features. Thus, minimum pitch of a photolithographic technique is an obstacle to continued feature size reduction using photolithography.
Techniques that have been used to overcome these limitations include pitch multiplication. Such typically forms features narrower than minimum photolithography resolution by depositing one or more spacer-forming layers to have a total lateral thickness which is less than that of the minimum capable photolithographic feature size. The spacer-forming layers are commonly anisotropically etched to form sub-lithographic features, and then the features which were formed at the minimum photolithographic are etched from the substrate.
An additional technique employs using two lithographic patterning steps to ultimately form a single pattern in an underlying hard-masking layer. However, this requires precisely positioning the second lithographic masking step relative to the first masking step. If alignment isn't exactly correct, subject to acceptable alignment tolerance, the ultimate pattern can fail resulting in inoperable or destructed circuitry.